IBM builds the world's first sub-nanometer chip: 0.7 nm

What happened?

IBM has announced the fabrication of the world's first chip using sub-nanometer process technology, specifically at a 0.7 nm (7 angstroms) node. This achievement, reported by Xataka, represents a historic milestone because it crosses the nanometer barrier in semiconductor manufacturing, something the industry has pursued for years. The chip integrates nearly 100 billion transistors in an area the size of a fingernail, thanks to an innovative three-dimensional architecture called nanostack. For context, the first commercial microprocessor, the Intel 4004 from 1971, had only 2,300 transistors in an area of about 12 mm². Today, IBM packs 43 million times more transistors in a comparable space. This leap is not just quantitative: transistor density reaches levels that allow integrating complete systems on a single chip, reducing latencies and energy consumption. IBM's achievement is especially relevant because the industry had been stuck for years in the transition from 7 nm to 5 nm, and then to 3 nm, with TSMC and Samsung leading. The nanometer barrier seemed insurmountable due to quantum effects that appear below 10 nm, such as electron tunneling or threshold voltage variability. IBM has overcome these challenges with a radically different approach: instead of simply shrinking traditional planar transistors, it has stacked silicon nanosheets in 3D, creating a vertical structure that improves current control and reduces leakage. This method, known as Gate-All-Around (GAA) with nanosheets, had already been explored by other manufacturers for 3 nm and 2 nm nodes, but IBM has taken it to the sub-nanometer extreme. The company has confirmed that the chip is functional and has passed preliminary tests, though it remains a laboratory prototype with no mass production date. Nevertheless, the announcement has sparked reactions across the industry: TSMC, which plans to launch its 2 nm node in 2025, and Samsung, with its 3 nm GAA process already in production, now face pressure to accelerate their roadmaps.

Why is this important?

Breaking the nanometer barrier is not just a matter of scale. For decades, Moore's Law has guided transistor miniaturization, but as we approach atomic dimensions, quantum physics poses enormous challenges. IBM has achieved this breakthrough not by simply shrinking conventional designs, but by reinventing the transistor structure with 3D stacked nanosheets, which improves electrical performance in a smaller space. Moore's Law, which states that the number of transistors on a chip roughly doubles every two years, has been slowing since the early 2010s, when 28 nm and 22 nm nodes began showing diminishing returns. The transition to 14 nm, 10 nm, and 7 nm required multi-billion-dollar investments in extreme ultraviolet (EUV) lithography and new materials like hafnium for high-k dielectrics. However, below 5 nm, quantum effects cause traditional FinFET transistors to lose efficiency. IBM, with its stacked nanosheet architecture, offers a viable solution that could extend Moore's Law for at least another decade. According to IBM, this new chip delivers up to 50% more performance or 70% more energy efficiency compared to its own 2 nm chips. This flexibility allows designers to tailor the chip for applications ranging from generative AI to cloud infrastructure or next-generation devices. For example, a data center operating with 10,000 0.7 nm processors could reduce its energy consumption by 70%, saving millions of dollars in electricity and significantly lowering its carbon footprint. In AI, language models like GPT-4 require enormous amounts of memory and computation; a chip with 100 billion transistors could integrate memory and logic on the same substrate, reducing data access latency and speeding up training. Additionally, improved energy efficiency would allow mobile devices to run AI inferences locally without relying on the cloud, enhancing privacy and responsiveness. The impact on supercomputing would also be notable: machines like Frontier, which currently consumes 21 MW, could achieve exascale performance with a third of the power.

Consequences for the industry

This announcement positions IBM as a relevant player in the race for the most advanced nodes, competing with TSMC, Samsung, and Intel. However, mass production of 0.7 nm chips still faces technical and cost challenges. It is expected to take several years before this technology reaches commercial products. Nevertheless, the milestone demonstrates that it is possible to continue scaling beyond current limits, which could extend the life of Moore's Law and enable new capabilities in computing, especially in AI and supercomputing. To understand the implications, it is useful to recall the history of sub-nanometer nodes. In 2017, IBM already fabricated the first 5 nm chip with nanosheets, and in 2021 it presented its 2 nm chip. Now, with the leap to 0.7 nm, the company is ahead of its rivals in demonstrating a functional sub-nanometer node. However, TSMC and Samsung have advantages in production scaling and relationships with clients like Apple, AMD, and NVIDIA. Intel, for its part, has announced plans to reach the 1.4 nm node by 2027-2029, but faces delays in its 7 nm and 5 nm processes. IBM's nanostack technology could be licensed or adopted by other manufacturers, as happened with FinFET transistors, which IBM developed and later became industry standard. However, mass production of 0.7 nm chips will require advances in high numerical aperture EUV (High-NA EUV) lithography, which is not yet fully mature. ASML, the only manufacturer of these machines, plans to deliver the first High-NA systems in 2025, but their cost exceeds 300 million euros per unit. This means only a few players will be able to afford sub-nanometer node fabrication, potentially further consolidating the semiconductor market. Additionally, yield and defect challenges are enormous: with 100 billion transistors, a single defect on a 300 mm wafer can ruin the entire chip. IBM has achieved acceptable yield in the lab, but mass production will require years of optimization. In the long term, this breakthrough could enable chips with billions of transistors for applications like neuromorphic computing, quantum sensors, or 6G communication systems. It could also drive research into new materials, such as graphene or transition metal dichalcogenides (TMDs), which could replace silicon in even smaller nodes.

What readers should know

• The chip is a laboratory prototype; there is no date for mass production. IBM estimates commercialization could take between 5 and 10 years, similar to the gap between its 2 nm demonstration in 2021 and the potential arrival of products based on that node around 2026-2027.
• The nanostack technology is key: it stacks silicon nanosheets in 3D, improving current control. This design is an evolution of the GAA transistor, already used by Samsung in its 3 nm chips and Intel in its upcoming nodes. The difference is that IBM has managed to stack up to 6 nanosheets, maximizing density without increasing area.
• The improvements are relative to IBM's 2 nm chips; competitors like TSMC already have plans for 2 nm and 1.4 nm nodes. TSMC has announced that its N2 (2 nm) node will enter production in 2025, and it is developing N1.4 (1.4 nm) for 2027-2028. Samsung, meanwhile, has its SF3 (3 nm) process in production and plans SF2 (2 nm) for 2025. IBM's 0.7 nm node, though more advanced, is still far from industrial reality.
• This breakthrough could accelerate the development of more efficient processors for data centers and mobile devices. For example, AI servers using chips like the NVIDIA H100, which has 80 billion transistors on TSMC's 4 nm node, could double performance with a 0.7 nm chip. However, adoption will depend on IBM's ability to find manufacturing partners, as the company sold its own semiconductor plants to GlobalFoundries in 2014 and now relies on external alliances.
• The milestone also has geopolitical implications. The United States, through the CHIPS Act, is investing $52 billion to revitalize its semiconductor industry. IBM's achievement strengthens the US position in cutting-edge research, but mass production remains concentrated in Taiwan and South Korea. If IBM can transfer its technology to a US foundry, it could reduce dependence on Asia.

"IBM has found a way out of the miniaturization dead end by reinventing the transistor architecture, not just shrinking it." — TheVortiq